AO4468 30v n-channel mosfet general description p roduct summary v ds i d (at v gs =10v) 1 0.5a r ds(on) (at v gs =10v) < 17m w r ds(on) (at v gs = 4.5v) < 23m w esd protected 100% uis tested 100% r g tested symbol v ds the AO4468 combines advanced trench mosfet technology with a low resistance package to provide extremely low r ds(on) . this device is ideal for load switch a nd battery protection applications. * rohs and halogen-free compliant v maximum units parameter absolute maximum ratings t a =25c unless otherwise noted 30v drain-source voltage 30 soic-8 t op view bottom view d d d d s s s g g d s v ds v gs i dm i as , i ar e as , e ar t j , t stg symbol t 10s steady-state steady-state r q j l c t hermal characteristics w 3.1 2 t a =70c j unction and storage temperature range -55 to 150 power dissipation b p d units p arameter typ max c/w r q j a 31 5 9 40 maximum junction-to-ambient a v 20 gate-source voltage mj avalanche current c 18 a 1 9 a 10.5 v 8.5 50 drain-source voltage 30 t a =25c t a =70c a valanche energy l=0.1mh c pulsed drain current c continuous drain c urrent t a =25c i d maximum junction-to-lead c/w c/w maximum junction-to-ambient a d 16 75 24 rev.7.0: july 2013 www.aosmd.com page 1 of 5 nt?qtu5[pg ?pqls? w w w . w h x p c b . c o m
AO4468 symbol min typ max units bv dss 30 v v ds =30v, v gs =0v 1 t j =55c 5 i gss 10 m a v gs(th) gate threshold voltage 1.2 1.8 2.4 v i d(on) 50 a 14 17 t j =125c 20 24 18 23 m w g fs 36 s v sd 0.75 1 v i s 4 a c iss 740 888 pf c oss 110 145 pf c rss 82 115 pf r g 0.5 1.1 1.7 w q g (10v) 15 nc q g (4.5v) 7.5 nc q gs 2.5 nc q gd 3 nc t d(on) 5 ns t 3.5 ns turn-on delaytime dynamic parameters turn-on rise time v =10v, v =15v, r =1.45 w , gate source charge v gs =0v, v ds =0v, f=1mhz total gate charge m w on state drain current i s =1a,v gs =0v v ds =5v, i d =10.5a v gs =4.5v, i d =9a forward transconductance maximum body-diode continuous current r ds(on) static drain-source on-resistance i dss drain-source breakdown voltage diode forward voltage m a v ds =v gs i d =250 m a v ds =0v, v gs =16v zero gate voltage drain current gate-body leakage current v gs =10v, v ds =15v, i d =10.5a i d =250 m a, v gs =0v v gs =10v, v ds =5v v gs =10v, i d =10.5a gate drain charge total gate charge input capacitance output capacitance electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions reverse transfer capacitance v gs =0v, v ds =15v, f=1mhz switching parameters gate resistance t r 3.5 ns t d(off) 19 ns t f 3.5 ns t rr 18 22 ns q rr 9 12 nc this product has been designed and qualified for the consumer market. applications or uses as critical c omponents in life support devices or systems are not authorized. aos does not assume any liability arising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. turn-on rise time turn-off delaytime v gs =10v, v ds =15v, r l =1.45 w , r gen =3 w turn-off fall time body diode reverse recovery charge i f =10.5a, di/dt=100a/ m s i f =10.5a, di/dt=100a/ m s body diode reverse recovery time a. the value of r q ja i s measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25 c. the value in any given application depends on the user's specific board design. b. the power dissipation p d is based on t j(max) =150 c, using 10s junction-to-ambient thermal resistance. c. repetitive rating, pulse width limited by junction temperature t j(max) =150 c. ratings are based on low frequency and duty cycles to keep initialt j =25 c. d. the r q ja is the sum of the thermal impedence from junction to lead r q jl and lead to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-ambient thermal impedence which is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, assuming a maximum junction temperature of t j(max) =150 c. the soa curve provides a single pulse rating. rev.7.0: july 2013 www.aosmd.com page 2 of 5 nt?qtu5[pg ?pqls? w w w . w h x p c b . c o m
AO4468 typical electrical and thermal characteristics 17 5 2 10 0 18 0 5 1 0 15 20 25 30 1 2 3 4 5 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 10 1 5 20 25 0 5 10 15 20 r ds(on) (m w w w w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1 1 .2 1.4 1.6 1.8 0 25 50 75 100 125 150 175 200 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v g s =4.5v i d =9a v g s =10v i d =10.5a 25 c 125 c v ds =5v v g s =4.5v v g s =10v 0 5 1 0 15 20 25 30 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =2.5v 3v 4 v 10v 3.5v 40 1.0e-05 1 .0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c (note e) 10 1 5 20 25 30 35 40 2 4 6 8 10 r ds(on) (m w w w w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) i d = 10.5a 25 c 125 c rev.7.0: july 2013 www.aosmd.com page 3 of 5 nt?qtu5[pg ?pqls? w w w . w h x p c b . c o m
AO4468 typical electrical and thermal characteristics 0 2 4 6 8 1 0 0 5 10 15 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 2 00 400 600 800 1000 1200 0 5 10 15 20 25 30 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c i ss c o ss c rss v d s =15v i d =10.5a 1 1 0 100 1000 10000 0.00001 0.001 0.1 10 1000 power (w) pulse width (s) figure 10: single pulse power rating junction - to - t a = 25 c 0.0 0 .1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) figure 9: maximum forward biased safe 10 m s 10s 1ms dc r d s(on) limited t j( max) =150 c t a =25 c 100 m s 10ms figure 10: single pulse power rating junction - to - ambient (note f) figure 9: maximum forward biased safe operating area (note f) 0.001 0 .01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 z q q q q ja normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal impedance (note f) d=t o n /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d =0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse r q ja = 75 c/w single pulse rev.7.0: july 2013 www.aosmd.com page 4 of 5 nt?qtu5[pg ?pqls? w w w . w h x p c b . c o m
AO4468 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off id + l vds bv unclamped inductive switching (uis) test circuit & wa veforms vds dss 2 e = 1/2 li ar ar vdd vgs vgs rg dut - + vdc vgs id vgs i ig vgs - + vdc dut l vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar di/dt i rm rr vdd vdd q = - idt t rr rev.7.0: july 2013 www.aosmd.com page 5 of 5 nt?qtu5[pg ?pqls? w w w . w h x p c b . c o m
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